1. Field of the Invention
Embodiments relate to a half-power buffer and/or amplifier.
2. Discussion of the Related Art
A liquid crystal display device generally includes pixels arranged in a matrix of rows and columns. Each pixel may include a thin film transistor and a pixel electrode formed on a substrate. Gates of thin film transistors arranged in the same row may be connected through a gate line and may be controlled by a gate driver.
Sources of thin film transistors arranged in the same column may be connected through a source line and may be controlled by a source driver.
In the case of a liquid crystal display device having increased resolution, an increased number of output buffers should be built in the source driver of the liquid crystal display device. In this case, power consumption is increased due to the increased number of buffers. In a portable appliance, power consumption of the liquid crystal display device determines available run time. For this reason, the liquid crystal display device of the portable appliance generally employs low-power buffers.
FIG. 6 shows a general half-power output buffer.
Referring to FIG. 6, in a first frame, a first buffer 11 for a first channel CH1 may output a first half power, for example, VDD2M˜VDD2, as a first output VOUT1, in accordance with selective connection of a switching unit 15. At the same time, a second buffer 12 for a second channel CH2 may output a second half power, for example, VSS2˜VDD2M, as a second output VOUT2, in accordance with the selective connection of the switching unit 15.
In a second frame next to the first frame, the first buffer 11 may output the first half power as the second output using the switching unit 15, and the second buffer 12 may output the second half power as the first output VOUT1. The switching unit 15 may perform a switching operation in response to an inversion polarity signal POL. The switching unit 15 may achieve dot inversion.
It may be impossible to appropriately remove offsets generated from or by the different buffers 11 and 12. As a result, display quality may degrade. For example, when offset directions of the first buffer 11 and second buffer 12 are opposite, the offset characteristics may accumulate. Although offset characteristics may be reduced by increasing a matching pair size, an increase in chip area may occur as a result.